Mont-Blanc 2020 partners Atos, Arm, BSC, Jülich and SiPearl shared their experience of the HPC system simulation tools they used and contributed to in a tutorial held as part of the digital HiPEAC conference 2021, on 18 January 2021, and entitled "Testing and evaluating workloads before silicon availability - The Mont-Blanc 2020 approach for SoC codesign".
A MOOC based on this tutorial is available on the Mont-Blanc Moodle site. It’s free, you can open an account and self enrol instantly. The quizzes are included, and you can get a certificate if you complete the full course. But you can also browse through the course and complete only the sessions that are most relevant for you.
The full recording, the slides and the pre-recorded demos are available below.
Pascale Bernier-Bruna (communication manager, Atos)
Alejandro Nocua (R&D Engineer in SoC Arm Modeling, Atos)
Francesc Martinez (Simulation Engineer, Barcelona Supercomputing Centre) and Adrià Armejach (Senior Researcher, Barcelona Supercomputing Centre)
Grégory Vaumourin (Software Engineer, Atos) and Joël Wanza (Simulation Chief Architect, SiPearl)
John Linford (Director of HPC Applications, Arm)
Basic SVE concepts, SVE intrinsics, and what the compilers can optimize
Bine Brank (PhD Student, Jülich Supercomputing Centre)
Richard Cooper (Staff Research Tools Engineer, Arm) and Javier Setoaïn (Staff Research Engineer, Arm)
