The Design, Automation and Test in Europe (DATE) Conference and exhibition is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the design, test and manufacturing of electronic circuits and systems hardware and software. DATE puts a strong emphasis on both technology and systems, covering ICs/ SoCs, reconfigurable hardware and embedded systems, as well as embedded software.
The Mont-Blanc 2020 had submitted a project-wide paper, which was featured in the Emerging trends in the HPC industry landscape session on February 2nd. It was presented by our project coordinator Said Derradji:
Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors
The Mont-Blanc 2020 (MB2020) project has triggered the development of the next generation industrial processor for Big Data and High Performance Computing (HPC). MB2020 is paving the way to the future low-power European processor for exascale, defining the System-on-Chip (SoC) architecture and implementing new critical building blocks to be integrated in such an SoC. In this paper, we first present an overview of the MB2020 project, then we describe our experimental infrastructure, the requirements of relevant applications, and the IP blocks developed in the project. Finally, we present our emulation-based final demonstrator and explain how it integrates within our first generation of HPC processors.