A journey of porting and optimization to the latest Arm-based processors
Bine Brank from the Jülich Supercomputing Centre will represent Mont-Blanc 2020 at this online workshop of the IEEE Cluster 2020 conference, with a presentation on “Porting Applications to Arm-based Processors“.
The IEEE Cluster 2020 conference will take place from 14th to 17th of September, online due to COVID-19.
Embracing Arm workshop
This workshop focuses on the porting and optimization of scientific and high-performance workloads to the Arm architecture. The last few years have seen an explosion of 64-bit Arm based processors targeted towards server and infrastructure workloads – often with a specialization towards a specific domain – such as HPC, cloud and machine learning.
Arm’s new Neoverse reference N1 core design has become the foundation for a number of emerging processors such as Amazon’s 64-core Graviton2 and Ampere’s 80-core Altra, with the EPI project incorporating the successor design into SiPearl’s Rhea chip. Further, architecture licenses are being exploited to design and manufacture bespoke solutions such as Marvell’s ThunderX line of processors and Fujitsu’s A64FX chip.
One of the most important additions to the Arm instruction set has been SVE – the Scalable Vector Extension – an architectural extension containing a comprehensive set of vector length agnostic vectorization instructions. Making its debut in the A64FX processor, these vector instructions present a paradigm shift for application developers.
In this workshop we invite papers on the porting and, if available, optimization of high-performance workloads to this new generation of Arm-based processors. We welcome performance optimization studies either through access to real hardware or via simulation/emulation frameworks, for both SVE and otherwise.
Content specifically focuses on HPC, Edge, and everything in between. Specifically, we will include talks related to applications and cross-over/emerging application areas such as machine learning, deep learning, bioinformatics, and analytics; all on Arm-compatible platforms.
This workshop is closely related to the series of workshops organized at ISC, SC and the Arm Research Summit, the Arm HPC User’s Group (AHUG).