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HiPEAC Computing Systems Week 2013: Coming Challenges for the Interconnect

May 3, 2013 2:00 pm to May 19, 2013 3:30 pm

The interconnect is the key component that permits the connectivity between all the components in a complex system. As technology advances, larger systems are designed, both at microscopic level and at macroscopic level. Thus, the interconnect is present and influencing inside the chip and at the core of large installations for cloud computing, datacenters, and HPC computing. The larger the system is, the more significance is paid to the interconnect.

Currently, the interconnect is called to address new functionalities arising from both domains. At chip level in order to become as fast and (power) efficient as possible, and in large systems in order to provide correct means of virtualization and partitioning. This is specially needed in datacenter systems. Also, reconfigurability of the interconnect is becoming a necessity inside the network to adapt to the changing environment and the different needs of the workload. In addition, we need to armonize and allow efficient implementation of other components in the system hierarchy, that is, the network must be designed not in isolation but with a system perspective.

In this thematic session we will address the interconnect component from both views, at chip level and at large-system level. The main target will be the discussion and exchange of ideas to identify coming challenges and the best practices to address them. Synergies between different communities (embedded and HPC) working on interconnects will be also the focus.

The session will have key contributions from highly-interconnect-related european industry partners. Among those, the Mont-Blanc Gnodal, provide their views and expertise as well as a keynote. Thus, this will be an don’t miss opportunity to see how interconnects will evolve.

Title: Interconnects for on-chip systems in High-Performance systems

Speaker: John Taylor (GNODAL)

Abstract: In this talk we discuss the impact of High Performance Ethernet Networking and how emerging Ethernet Fabrics are beginning to provide key elements of scalability and performance, hitherto only available in proprietary networks. We focus in particular on the operation of the Gnodal Ethernet Fabric, but the concept of the Ethernet Fabric however is not specific to Gnodal. A number of Ethernet manufacturers provide similar constructs, this underlying a general trend that Ethernet switches need to co-operate as a unified system, not just bound by Spanning Tree. Treating the system as a whole, congestion can potentially be overcome as all paths in the network can be utilized. Additionally new classes of operation can be serviced based on underlying requirements such as lossless communication. Implicit in this cooperative scheme is a requirement for low-latency, not just in minimizing the end-to-end latency of applications, but also in providing the system mechanisms to orchestrate arbitration across multiple switch components or chips.