Denver, Colorado — November 13, 2017 — The Mont-Blanc European project has been recognized in the annual HPCwire Readers’ and Editors’ Choice Awards, presented at SC17, in Denver, Colorado. The list of winners was revealed to kick off the annual supercomputing conference, which showcases high performance computing, networking, storage, and data analysis. Mont-Blanc was recognized with the following award:
Editors’ Choice: Best HPC Collaboration (Academia/Government/Industry): Mont-Blanc, European R&D projects investigating a new type of energy-efficient computer architecture for HPC, leveraging Arm processor.
The coveted annual HPCwire Readers’ and Editors’ Choice Awards are determined through a nomination and voting process with the global HPCwire community, as well as selections from the HPCwire editors. The awards are an annual feature of the publication and constitute prestigious recognition from the HPC community.
“The Mont-Blanc Partners are extremely honored to receive this award. It acknowledges our collective and pioneering effort to demonstrate the viability of using Arm technology for HPC, and to develop the Arm HPC ecosystem. Back in 2011, when Mont-Blanc started, our vision was not shared by many. But the recent surge of interest for Arm processors in the HPC community is proving us right!” explained Etienne Walter, Atos, coordinator of the Mont-Blanc 3 project.
One of the outcomes of the Mont-Blanc project was recognized by another award: Atos has won the “Editors’ Choice award – Top 5 New Products or Technologies to Watch” for its BullSequana X1310, an Arm-based server derived directly from the latest prototype developed for Mont-Blanc.
“From innovative industry leaders to the end consumer, the HPCwire readership reaches and engages every aspect of the high performance computing community,” said Tom Tabor, CEO of Tabor Communications, publisher of HPCwire. “There is undeniable community support signified in receiving this award. Not only from the entire HPC space, but also the amplitude of industries it serves. We proudly recognize these efforts and achievements and gladly allow the voices of our readers to be heard. Our sincere congratulations to all of the winners.”
About the Mont-Blanc project
The current third phase of the Mont-Blanc project continues to take a holistic approach, encompassing hardware, operating system and tools, and applications, with the following targets:
- Defining the architecture of an Exascale-class compute node based on the Arm architecture, and capable of being manufactured at industrial scale;
- Assessing the available options for maximum compute efficiency;
- Developing the matching software ecosystem to pave the way for market acceptance of Arm solutions.
The current phase of the project is run by a European consortium that includes:
- Industrial hardware/software technology providers: Atos, using its expertise in supercomputing & Big data following the acquisition of Bull (coordinator – France); Arm, the world leader in embedded high-performance processors (United Kingdom); and AVL, the world’s largest independent company for the development, simulation and testing technology of powertrains (Austria);
- Academic/research HPC centres: Barcelona Supercomputing Centre (Spain); Swiss Federal Institute of Technology in Zurich (Switzerland); Centre National de la Recherche Scientifique (CNRS/LIRMM – France); University of Stuttgart (HLRS -Germany); University of Cantabria (Spain); University of Graz (Austria); University of Versailles Saint Quentin (France).
This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 671697.
More information on www.montblanc-project.eu | @MontBlanc_EU
Tel: (+33) 1 30 80 32 04