Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors
Armejach, A. - Brank, B. - Cortina, J. - Dolique, F. - Hayes, T. - Ho, N. - Lagadec, P. - Lemaire, R. - Lopez-Paradis, G. - Marliac, L. - Moreto, M. - Marcuello, P. - Pleiter, D. - Tan, X. - Derradji, S.
Conference Proceedings
2021
The gem5 Simulator: Version 20.0+ – A new era for the open-source computer architecture simulator
Lowe-Power, J. - Mutaal-Ahmad, A. - Akram, A. - Armejach, A. - Diestelhorst, S. - Hayes, T. - Jeyapaul, R. - Setoain, J.
Research Paper
2020
Towards Resilient EU HPC Systems: A Blueprint
Radojkovic, P. - Marazakis, M. - Carpenter, P. - Jeyapaul, R. - Gizopoulos, D. - Schulz, M. - Armejach, A. - Ayguadé, E. - Bodin, F. - Canal, R. - Cappello, F. - Chaix, F. - Colin-de-Verdière, G. - Derradji, S. - Di-Carlo, S. - Engelmann, C. - Laguna, I. - Moreto, M. - Mutlu, O. - Papadopoulos, L. - Perks, O. - Ploumidis, M. - Salami, B. - Sazeides, Y. - Soudris, D. - Sourdis, Y. - Stenstrom, P. - Thibault, S. - Toms, W. - Unsal, O.
Research Paper
2020
Using Arm’s scalable vector extension on stencil codes
Armejach, A. - Caminal, H. - Cebrian, J. - Langarita, R. - González-Alberquilla, R. - Adeniyi-Jones, C. - Valero, M. - Casas, M. - Moreto, M.
Journal Article
2019
Stencil Codes on a Vector Length Agnostic Architecture
Armejach, A. - Caminal, H. - Cebrian, J. - González-Alberquilla, R. - Adeniyi-Jones, C. - Valero, M. - Casas, M. - Moreto, M.
Conference Paper
2018
MUSA: A Multi-Level Simulation Infrastructure for Next-Generation HPC Machines
Grass, T. - Allande, C. - Armejach, A. - Rico, A. - Ayguadé, E. - Labarta, J. - Valero, M. - Casas, M. - Moreto, M.
International Conferences
2016
