Said$-$Derradji Archives

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Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors

Armejach, A. - Brank, B. - Cortina, J. - Dolique, F. - Hayes, T. - Ho, N. - Lagadec, P. - Lemaire, R. - Lopez-Paradis, G. - Marliac, L. - Moreto, M. - Marcuello, P. - Pleiter, D. - Tan, X. - Derradji, S.

Conference Proceedings

2021

Mont-Blanc 2020 NoC: A low-power and high bandwidth Network on Chip generator

Lagadec, P. - Derradji, S. - Nocua, A. - Menyhart, Z.

Conference Paper

2020

Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing : Embedded Tutorial

Nocua, A. - Derradji, S. - Vaumourin, G. - Lagadec, P. - Menyhart, Z.

International Conferences

2020

Towards Resilient EU HPC Systems: A Blueprint

Radojkovic, P. - Marazakis, M. - Carpenter, P. - Jeyapaul, R. - Gizopoulos, D. - Schulz, M. - Armejach, A. - Ayguadé, E. - Bodin, F. - Canal, R. - Cappello, F. - Chaix, F. - Colin-de-Verdière, G. - Derradji, S. - Di-Carlo, S. - Engelmann, C. - Laguna, I. - Moreto, M. - Mutlu, O. - Papadopoulos, L. - Perks, O. - Ploumidis, M. - Salami, B. - Sazeides, Y. - Soudris, D. - Sourdis, Y. - Stenstrom, P. - Thibault, S. - Toms, W. - Unsal, O.

Research Paper

2020

Mont-Blanc 2020: Trigger the development of the next generation of industrial processor for HPC and Big Data

Derradji, S. - Bernier-Bruna, P.

Poster

2018

Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach

Caheny, P. - Alvarez, L. - Derradji, S. - Valero, M. - Moreto, M. - Casas, M.

Journal Article

2018

Efficiency Modeling and Exploration of 64-bit ARM Compute Nodes for Exascale

Weloli, J. - Bilavarn, S. - De Vries, M. - Derradji, S. - Belleudy, C.

Journal Article

2017

Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC

Weloli, J. - Bilavarn, S. - Derradji, S. - Belleudy, C. - Lesmanne, S.

Journal Article

2016

All of our publications

Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors

Mont-Blanc 2020 NoC: A low-power and high bandwidth Network on Chip generator

Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing : Embedded Tutorial

Towards Resilient EU HPC Systems: A Blueprint

Mont-Blanc 2020: Trigger the development of the next generation of industrial processor for HPC and Big Data

Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach

Efficiency Modeling and Exploration of 64-bit ARM Compute Nodes for Exascale

Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC