Four successive projects with a common aim: European, energy-efficient HPC. The first three Mont-Blanc projects assessed the potential of Arm-based clusters to address HPC needs and largely contributed to create the corresponding ecosystem. Mont-Blanc 2020 prepares the way for a European processor aimed at HPC and other markets.
Compute efficiency and energy efficiency are more than ever major concerns for future Exascale systems. Since October 2011, the aim of the European projects called Mont-Blanc has been to design a new type of computer architecture capable of setting future global HPC standards, built from energy efficient Arm solutions. Phases 1 (2011-2015) and 2 (2013-2016) of the project were coordinated by the Barcelona Supercomputing Center (BSC). They investigated the usage of low-power Arm processors for HPC and gave rise to the world’s first Arm-based HPC cluster, which helped demonstrate the viability of using Arm technology for HPC. The third phase of the Mont-Blanc project started in October 2015: it is coordinated by Atos (formerly Bull). It aims at designing a new high-end HPC platform that is able to deliver a new level of performance / energy ratio when executing real applications. Finally, Mont-Blanc 2020 is a spin-off of the previous projects. It is coordinated by Atos and started in December 2017. It ambitions to trigger the development of the next generation of industrial processor for Big Data and High Performance Computing.
Four successive projects funded by the European Commission, a common aim: European, energy-efficient HPC
The first phase of Mont-Blanc was coordinated by the Barcelona Supercomputing Center (BSC) and had a budget of over 14 million, including over 8 million Euros funded by the European Commission. From 2011 – 2015, the Mont-Blanc project had the following three objectives:
Its ambition was to imagine a new type of computer architecture capable of setting future global HPC standards that will provide Exascale performance using 15 to 30 times less energy.
Mont-Blanc 1 achievements: read the Executive summary report>
Phase 2 of the project was again coordinated by the Barcelona Supercomputing Center (BSC). Two years after the start of the initial project, the European Commission granted an additional 8 million Euro to extend the Mont-Blanc project activities until September 2016. This three-year extension enabled further development of the OmpSs parallel programming model to automatically exploit multiple cluster nodes, transparent application check pointing for fault tolerance, support for ARMv8 64-bit processors, and the initial design of the Mont-Blanc Exascale architecture. This phase had the following three objectives:
This extension of Mont-Blanc contributed to the development of extreme scale energy-efficient platforms, with potential for Exascale computing, addressing the challenges of massive parallelism, heterogeneous computing, and resiliency.
Mont-Blanc 2 achievements: read the Executive summary report>
The third phase of the Mont-Blanc project ran from October 2015 to end 2018: it was coordinated by Bull (Atos group), and had a budget of 7.9 million Euros, funded by the European Commission under the Horizon 2020 programme.
The third phase of the Mont-Blanc project built upon the previous FP7 projects, with Arm, BSC & Bull being involved in all three projects. It adopts a co-design approach to ensure that hardware and system innovations are readily translated into benefits for HPC applications. It aims at designing a new high-end HPC platform that is able to deliver a new level of performance / energy ratio when executing real applications.
This encompassed the three following objectives:
A key achievement of Mont-Blanc 3 was the design of its Dibona prototype, commercialized by Atos as part of their BullSequana X1000 range within the lifetime of the project.
Read the project final report for fuller information on the project outcomes>
Following on from the three successive Mont-Blanc projects since 2011, the three core partners Arm, Barcelona Supercomputing Center and Bull (Atos Group) have united again to trigger the development of the next generation of industrial processor for Big Data and High Performance Computing. The Mont-Blanc 2020 consortium also includes CEA, Forschungszentrum Jülich, Kalray, and SemiDynamics. The Mont-Blanc 2020 project has a budget of 10.1 million Euros, funded by the European Commission under the Horizon2020 program. It was launched in December 2017. It intends to pave the way to the future low-power European processor for Exascale. To improve the economic sustainability of the processor generations that will result from the Mont-Blanc 2020 effort, the project includes the analysis of the requirements of other markets. The project’s strategy based on modular packaging would make it possible to create a family of SoCs targeting different markets, such as “embedded HPC” for autonomous driving. The project’s actual objectives are to:
